In recent years, various high speed digital wireless methods including a cellular phone, a wireless LAN, a Bluetooth and a digital terrestrial TV etc. have been put into practical use. Analog technologies similar to those in the wireless circuits are also used in semiconductor integrated circuits which perform digital signal processing, and particularly in the circuits which operate at a high speed more than GHz. In those circuits, on-chip inductors which are formed on a semiconductor substrate are used as a passive component. This inductor has a constitution in which a metal wire is coiled in a spiral pattern on the semiconductor.
This type of on-chip inductor is often used as part of a resonance circuit in analog circuits. The resonance circuit is resonated by connecting an inductor(s) and a capacitor(s) in series or parallel. The resonance frequency f0 is determined by an inductance value L of the inductor and a capacitance value C of the capacitor as shown in Equation (1).
                              f          0                =                  1                      2            ⁢            π            ⁢                          LC                                                          (        1        )            
The resonance circuit produces effects in which it has a high gain and an impedance matching and oscillates etc. at the resonance frequency f0. However, since this type of resonance occurs only at a narrow band frequency near the resonance frequency, it is necessary to vary the resonance frequency in order to produce a circuit which is capable of operating at various frequencies. To this end, L or C has to be varied. FIG. 9 shows an amplifier example using this resonance circuit, and a load including inductor L31 and capacitor C31 is connected to MISFET M31 as shown in the FIG. 9. Gm is referred to as a transconductance of M31, and R31 is referred to as a series resistance of the inductor, and by neglecting a series resistance of the capacitor and a parasitic capacitance(s) other than the capacitor, a gain at this time is expressed in Equation (2).
                    gain        =                              Gm            ×                          (                                                                    R                    ⁢                                                                                  ⁢                                          31                      2                                                        +                                                            ω                      2                                        ⁢                    L                    ⁢                                                                                  ⁢                                          31                      2                                                                                        R                  ⁢                                                                          ⁢                  31                                            )                                =                      Gm            ×                          (                                                L                  ⁢                                                                          ⁢                  31                                                  C                  ⁢                                                                          ⁢                  31                  ⁢                  R                  ⁢                                                                          ⁢                  31                                            )                                                          (        2        )            
From Equation (2), the gain of the amplifier is reduced if the capacitance is increased, and it is raised if the inductance is increased. A method of varying the capacitance is generally used to vary the resonance frequency. The reason is that it is easy to realize a variable capacitor by an element like a varactor using a p-n junction when the capacitance is formed as an on-chip. However, from Equation (1), the gain is reduced at a lower frequency in which C is increased if the resonance frequency is varied by the capacitance while the inductance is fixed. That is, it is difficult to vary the resonance frequency largely only by varying the capacitance.
An on-chip oscillator is proposed in the Patent Document 1 that has an integrated structure of an inductor and a capacitor. This cross-sectional structure is shown in FIG. 10A, and the planar structure is shown in FIG. 10B. FIG. 10A shows the structure in cross-section AA of FIG. 10B. As shown in FIGS. 10A and 10B, a p-n junction region formed by a p-type silicon and a n-well just below inductor wiring L8 is connected to an inductor wiring. This makes a capacitance due to the p-n junction occur between the inductor wiring and ground wiring G8 connecting to the n-type substrate. Since the capacitance exists in all over the inductor wiring, this circuit becomes an oscillator which has a transmission-line type circuit as shown in FIG. 11. However, since the oscillation frequency is dependent on a delay time of the transmission-line in the circuit, the circuit does not operate as a lumped-constant LC resonator. Due to this, there has been a problem that many unwanted high-harmonic components occur.
In a LC resonance type oscillator circuit of FIG. 3 of the Patent Document 2, a secondary side inductance element (L2) is provided that is placed facing an inductance element (L1) which comprises the LC oscillation circuit and connected by mutual induction, and furthermore a capacitance element (C2) and a switch element (SW1) are connected in parallel between both terminals of the secondary inductance element. An oscillation circuit is described that expands the frequency variable range and suppresses a variation of Q so that an equivalent inductance increases as the capacitance element is connected between the both terminals of the secondary side inductance element in a state where the switch element is turned off, and that the equivalent inductance decreases as the both terminals of the secondary side inductance are short-circuited in a state where the switch element is turned on.    [Patent Document 1]
Japanese Patent Kokai Publication No. JP-P2002-319624A    [Patent Document 2]
Japanese Patent Kokai Publication No. JP-P2007-174552A, which corresponds to US Patent Application Publication No. US2007/0146088A1.